Since an IGBT is provided with a control gate terminal of a MOS structure having excellent controllability and exhibits a low on-voltage by conductivity modulation based on bipolar operation, it is widely applied from industrial use to consumer use, mainly to an intermediate-capacity inverter, and plays a major role of a switching device for power electronics.
FIG. 75 is a cross-sectional view of the principal part showing an example of a trench gate IGBT, and FIG. 76 is an explanatory drawing showing the relation between the substrate depth at the positions along the line A-A of FIG. 75 and the carrier density in an on-state.
In the trench gate IGBT as shown in FIG. 75, in an on-state, holes (positive holes) are actively injected from a p+ type semiconductor substrate 101 (including a collector metal electrode 120 on the lower surface thereof) of the rear surface side to an n− type base layer 102 via an n type buffer layer 118. Also, the main surface side has a structure in which the holes pass through a p type channel layer 107 and a p+ type emitter layer 109 and are withdrawn to an emitter metal electrode 116. The emitter metal electrode 116 has a structure which penetrates through an n+ type source region 108 to reach the p+ type emitter layer 109 therebelow. As a result, in the on-state, the carrier (hole) density distribution is concentrated on the collector side (rear surface side) compared with the emitter side (see FIG. 76). The reference numeral 110 in FIG. 75 denotes a gate insulating film.
In the above-described trench gate IGBT, when turned off from its on-state, the holes present at a higher density on the collector side than that on the emitter side pass through the thick n type base layer 102 and flow into the emitter electrode 116 further through the p type channel layer 107 and the p+ type emitter layer 109. Herein, since the moving speed of the holes is slow, the time required for the turn-off is extended, so that there are the problems that switching operation of the trench gate IGBT becomes slow and turn-off loss (thermal loss) is increased.
As a countermeasure for such problems, Japanese Patent Application Laid-Open Publication No. 2006-100779 (Patent Document 1) discloses an example of a planar gate IGBT. FIG. 77 is a cross-sectional view of the principal part showing an example of the planar gate IGBT, and FIG. 78 is an explanatory drawing showing the relation between the substrate depth at the positions along the line A-A of FIG. 77 and the carrier density in an on-state.
In the planar gate IGBT as shown in FIG. 77, an n− type surface semiconductor layer 104 is formed on a main surface of an n− type base layer 102 via a buried insulating film 103. Also, since a p type collector layer 119 (including a collector metal electrode 120 on the lower surface thereof) having a lower impurity concentration than that of the p+ type semiconductor substrate 101 of the above-described trench gate IGBT is used, the efficiency of injection of holes (positive holes) from the p type collector layer 119 to the n− type base layer 102 is lowered in an on-state. On the other hand, since the holes are blocked by the buried insulating film 103 and the holes flow in only from an opening part 105 formed in the buried insulating film 103 on the main surface side, the hole current is limited and the holes are easily accumulated on the emitter side in this structure. Therefore, in the on-state, the density distribution of the carriers (holes) is concentrated on the emitter side (main surface side) compared with that of the base side (rear surface side) (see FIG. 78).
In the above-described planar gate IGBT, since the holes are accumulated immediately below the buried insulating film 103 in the on-state, the so-called IE (Injection Enhancement) effect that injection of electrons from the n+ type source region 108 to the n− base layer 102 via a channel inversion layer (p type channel layer 107) is activated to improve the electric conductivity appears. When turned off from the on-state like this, most of the holes are present in the vicinity of the emitter and therefore quickly flow into the emitter metal electrode 116. As a result, in the planar gate IGBT shown in FIG. 77, switching operation is speeded up, and turn-off loss can also be reduced.
Furthermore, “Akio Nakagawa, “Theoretical Investigation of Silicon Limit Characteristics of IGBT”, Proceedings of the 18th International Symposium on Power Semiconductor Devices & IC's Jun. 4-8, 2006 Naples, Italy” (Non-Patent Document 1) discloses the technology in which, in a trench gate IGBT, the distance between adjacent gate electrodes is reduced and a p type channel layer with the narrowed width is completely inverted, thereby bringing the hole current close to 0 to intensify the above-described IE effect.    Patent Document 1: Japanese Patent Application Laid-Open Publication No. 2006-100779    Non-Patent Document 1: Akio Nakagawa, “Theoretical Investigation of Silicon Limit Characteristics of IGBT”, Proceedings of the 18th International Symposium on Power Semiconductor Devices & IC's Jun. 4-8, 2006 Naples, Italy